For many years the unrivalled peak performance, long-term stability, and wide software compatibility of x86 has allowed it to dominate high-end mission-critical applications. However, the increasing capability of Arm-based architectures is shifting the status quo for modern edge systems that require real-time performance, sensor fusion, and Artificial Intelligence (AI) within narrow power envelopes. Here, we examine the reasons behind this trend before introducing the SECO SOM-COMe-CT6-Dragonwing-IQ-X, a compact computing platform that showcases the advantages of high-performance Arm and eases its adoption.
Over decades, x86 has been the de-facto standard in embedded architectures for high-end mission-critical systems. The reasons lie in the high performance of available processors, the long-term deployment perspective enabled by Computer-on-Module (COM) standards such as COM Express, and broad software compatibility. Typical application areas for x86 designs range from industrial control systems and medical devices to critical infrastructures in communication and energy networks.
In parallel, Arm evolved as the dominant architecture for low-power, energy-efficient embedded designs. The focus was on deterministic behavior, low power consumption with low Thermal Design Power (TDP), and a high level of integration. This clear separation between the two worlds persisted for a long time.
Today, however, this separation is beginning to blur. Modern high-performance Arm processors are reaching performance levels comparable to advanced x86 CPUs and are now capable of enabling mission-critical platforms, as well.
New Requirements Through Changed Edge Workloads
With the currently available high-performance Arm processors, CPU manufacturers are ushering in a new era that is challenging the dominance of x86 in recent years. A key driver of this shift is the evolution of typical edge applications, which previously focused on capturing data and forwarding it to the cloud, but now increasingly need to handle complex AI tasks locally.
These include, for example, AI inference tasks for edge computing, sensor fusion, and real-time data analytics. Such complex workloads require not only high computing performance, but also low latency in data transfer and deterministic behavior.
At the same time, additional factors are gaining importance, especially in mission-critical infrastructures. Particularly in thermally constrained environments, developers must increasingly consider performance per Watt. Furthermore, the complexity of system integration continues to increase. This predominantly affects designs that must meet Size, Weight, Power, and Cost (SWaP-C) requirements. In addition, considerations exist to keep Bill-of-Materials (BOM) costs low and to ensure long lifecycle availability.
All these requirements align well with development in the Arm ecosystem, which addresses modern expectations through high integration density, energy efficiency, and long-term availability.
Examining the Impact of High-Performance Arm Designs
In the past, developers often had to choose between low-power Arm and high-performance x86 architectures. With the emergence of high-performance Arm designs, however, the fundamental design question is shifting. Instead of a trade-off between performance and power consumption, a balanced compromise between both aspects is coming into focus.
This improving performance vs. power consumption tradeoff balancing act is most evident in the transition from traditional to high-performance designs. Modern platforms with high-end CPUs are progressively approaching server-class workloads in terms of computing performance, making them suitable for mission-critical systems. These platforms often integrate CPU, GPU, and NPU within a single system on a chip (SoC), which reduces the number of external components on the carrier board, thereby increasing system reliability and improving the Mean Time Between Failures (MTBF).
Another key aspect is the integration of AI acceleration through an NPU directly on the SoC. This integration reduces the need for costly external AI accelerator modules (depending on AI workload, model size, and other factors), as well as additional interfaces and associated latencies, which is particularly relevant for edge AI and real-time analytics. Moreover, unified memory architectures allow the CPU, GPU, and NPU to access shared memory regions, further reducing latency.
Thus, the industrial maturity of modern Arm platforms has significantly advanced. Enhanced security features, high availability, and support for industrial temperature ranges enable deployment in harsh environments. At the same time, the Operating System (OS) ecosystem has evolved; in addition to Linux distributions, real-time operating systems and hybrid approaches are increasingly available, making Arm platforms suitable for mixed workloads. Open standards further facilitate the adoption of these technologies. Existing system designs can be reused, integrating new architectures without requiring complete redesigns.
Leveraging Open COMs for Mission-Critical Edge Platforms
COMs are standardized, pluggable compute modules that provide processor, memory, and core functionality on a compact module, separating these functions from the application-specific carrier board. Open COM standards offer advantages across the entire lifecycle, enabling a scalable platform strategy, reducing dependencies on individual processor architectures, and facilitating migration (for example, from x86 to Arm). Existing carrier designs can often be reused or adapted with manageable effort.
One example of this approach is the SOM-COMe-CT6-Dragonwing-IQ-X from SECO. The module is based on the COM Express Type 6 Compact standard (95 mm x 95 mm), which has traditionally been strongly associated with the x86 ecosystem. Combining this standard with an Arm-based platform simplifies integration into existing systems and lowers the barrier to adopting a new architecture.
The module is available in commercial and industrial variants, addressing different application scenarios. At its core is an Arm-based SoC architecture from the Qualcomm Dragonwing IQ-X series. It includes a multi-core CPU with a clock frequency of 3.4 GHz, an integrated Hexagon NPU delivering up to 45 TOPS (Tera Operations per Second) for real-time AI inference and analytics, and an Adreno GPU capable of driving up to four independent displays for multi-screen and visualization applications. On the software side, the platform supports Linux-based operating systems, including Yocto, enabling flexible integration into existing software stacks.
In addition, the module provides modern interfaces such as 2x PCIe Gen 4, 2x USB4 Gen 3, and 2.5 Gigabit Ethernet with Time-Sensitive Networking (TSN). These, and additional features, enable both high data throughput and deterministic communication for real-time applications. An available evaluation kit supports developers in quickly bringing up and validating the platform.
Conclusion
The x86 design remains a strong and proven architecture for mission-critical applications. At the same time, modern Arm platforms demonstrate that high performance, low energy consumption, and deep system integration are increasingly compatible.
The combination of high-performance Arm processors and open standards such as COM Express enables existing systems to evolve step-by-step. Platforms like the SOM-COMe-CT6-Dragonwing-IQ-X provide a concrete foundation for efficiently implementing AI, real-time analytics, and complex edge workloads.
For developers, this means one thing above all: choosing the right architecture is no longer a question of “either-or” but rather of selecting the optimal overall profile for a given application.
For more information about the SOM-COMe-CT6-Dragonwing-IQ-X, visit the SECO website. The SECO team is happy to support you regarding individual questions.