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Solution Briefs

Enabling a Standard-based and Secure Experience at the Edge

With ASTRID 3.5” SBC based on NXP i.MX 8M Mini microprocessors, SECO joins Arm Project Cassini and its purpose of creating a secure Arm edge ecosystem where interoperability is guaranteed.



Read the Solution Brief on Arm Partner Ecosystem Catalog






With AI, 5G, and the Internet of Things reaching maturity at the same time, the Fifth Wave of Computing is underway. IoT technology is making devices far more capable of processing data on the edge, without the need to transmit large amounts of information at speed and over distance, thus achieving greater efficiencies. On-device processing, however, raises the issue of interoperability: the higher the number of IoT endpoints, the grater the risk of HW diversity being an obstacle to compatibility. Joining Project Cassini, SECO shares Arm’s purpose of creating a secure Arm edge ecosystem where interoperability is guaranteed by establishing a more uniform hardware system architecture and consistency around key processes like boot, through a standards-based approach.




As the IoT continues is relentless growth, so does the capability of processing data within edge servers or endpoint devices. Bandwidht, power, latency, and security are just few reasons why migrating workloads right near the data source. But there is also the other side of the coin. The increase in number of edge enpoints is matched by an increase in variety, and diversity among devices may be an obstacle to their interoperability, especially at the application level. In a scenario where fragmentation might prevent unlocking the value of IoT, the shift from a massively distributed, heterogenous compute to a centralized, homogenous one is critical: the more diverse the endpoints, the lower the power; the more integrated the endpoints, the greater the compute. This is where Project Cassini stands: bringing Arm Cloud-native ecosystem success to the edge, thus ensuring that software works seamlessly across a diverse ecosystem of hardware.




SECO joined the Project Cassini initiative with ASTRID 3.5” SBC based on NXP i.MX 8M Mini microprocessors, which achieved SystemReady IR certification: targeting IoT edge devices that are built around SoCs based on the Arm A-profile architecture, it ensures interoperability with embedded Linux and other embedded OS. This means that SECO’s ASTRID implements a set of hardware and firmware features that a non-proprietary OS can depend on to deploy the OS image; then, it can leverage a broad software ecosystem, and it can be seamlessly integrated into larger networks which can be used by partners in many different markets. Achieving SystemReady IR certification, ASTRID SBC aligns with a set of standard for the development of edge platforms, enabling easy deployment of cloud-based software and applications in the field. From a customer’s perspective, choosing this platform ensures that it works in an ecosystem where hardware has a security baseline aligned with key standards regulation.


The SECO ASTRID 3.5” SBC with the NXP i.MX 8M Mini Processors



Key features



  • Cortex-M
  • Cortex-A




  • Industrial
  • IoT
  • Hardware Provider
  • Healthcare
  • Mobile Computing
  • Operating Systems
  • Artificial Intelligence